SOKÉ UČENÍ TECHNCKÉ BRNĚ BRNO UNERST OF TECHNOLOG FAKULTA ELEKTROTECHNK A KOMUNKAČNÍCH TECHNOLOGÍ ÚSTA MKROELEKTRONK FACULT OF ELECTRCAL ENGNEERNG AND COMMUNCATON DEPARTMENT OF MCROELECTRONCS OBOD PRO ANALOGOÉ PRACOÁNÍ SGNÁLŮ NA BÁ NEKONENČNÍCH AKTNÍCH PRKŮ CRCUTS FOR ANALOG SGNAL PROCESSNG EMPLONG UNCONENTONAL ACTE ELEMENTS DERTAČNÍ PRÁCE DOCTORAL THESS AUTOR PRÁCE AUTHOR EDOUCÍ PRÁCE SUPERSOR ng. NABHAN KHATB prof. ng. DALBOR BOLEK, CSc. Brno, 3
ABSTRACT The dissertation thesis deals with implementing new structures of modern active elements working in voltage _, current _, and mixed mode. The functionality and behavior of these elements have been verified by SPCE simulation. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of those elements. However, a big attention to implement active elements by utilizing L LP (Low oltage Low Power) techniques is given in this thesis. This attention came from the fact that growing demand of portable electronic equipments and implantable medical devices are pushing the development towards L LP integrated circuits because of their influence on batteries lifetime. More specifically, the main contribution of this thesis is to implement new CMOS structures of: CC (Current Conveyor Second Generation) based on BD (Bulk Driven), FG (Floating Gate) and QFG (Quasi Floating Gate); DCC (Differential oltage Current Conveyor) based on FG; Transconductor based on new technique of BD _ QFG (Bulk Driven _ Quasi Floating Gate); CCCDBA (Current Controlled Current Differencing Buffered Amplifier) based on conventional GD (Gate Driven); DBA (oltage Differencing Buffered Amplifier) based on GD. Moreover, defining new active element i.e. DBeTA (Differential _ nput Buffered and External Transconductance Amplifier) based on BD is also one of the main contributions of this thesis. To confirm the workability and attractive properties of the proposed circuits many applications were exhibited. The given results agree well with the theoretical anticipation. KEWORDS Analog signal processing, current mode, voltage mode, mixed mode, active elements, low voltage, low power, frequency filter, universal filter, quadrature oscillator.
ABSTRAKT Disertační práce se zabývá zaváděním nových struktur moderních aktivních prvků pracujících v napěťovém, proudovém a smíšeném režimu. Funkčnost a chování těchto prvků byly ověřeny prostřednictvím SPCE simulací. této práci je zahrnuta řada simulací, které dokazují přesnost a dobré vlastnosti těchto prvků, přičemž velký důraz byl kladen na to, aby tyto prvky byly schopny pracovat při nízkém napájecím napětí, jelikož poptávka po přenosných elektronických zařízeních a implantabilních zdravotnických přístrojích stále roste. Tyto přístroje jsou napájeny bateriemi a k tomu, aby byla prodloužena jejich životnost, trend navrhování analogových obvodů směřuje k stále většímu snižování spotřeby a napájecího napětí. Hlavním přínosem této práce je návrh nových CMOS struktur: CC (Current Conveyor Second Generation) na základě BD (Bulk Driven), FG (Floating Gate) a QFG (Quasi Floating Gate); DCC (Differential oltage Current Conveyor) na základě FG, transkonduktor na základě nové techniky BD _ QFG (Bulk Driven _ Quasi Floating Gate), CCCDBA (Current Controlled Current Differencing Buffered Amplifier) na základě GD (Gate Driven), DBA (oltage Differencing Buffered Amplifier) na základě GD a DBeTA (Differential _ nput Buffered and External Transconductance Amplifier) na základě BD. Dále je uvedeno několik zajímavých aplikací užívajících výše jmenované prvky. ískané výsledky simulací odpovídají teoretickým předpokladům. KLÍČOÁ SLOA pracování analogových signálů, proudový režim, napěťový režim, smíšený režim, aktivní prvky, nízké napětí, nízký výkon, frekvence filtru, univerzální filtr, kvadraturní oscilátor.
KHATB, N. Circuits for analog signal processing employing unconventional active elements. Brno: Brno University of Technology, Faculty of Electrical Engineering and Communication, 3. 64 p. Supervised by prof. ng. Dalibor Biolek, CSc..
DECLARATON declare that have elaborated my doctoral thesis on the theme of Circuits for analog signal processing employing unconventional active elements independently, under the supervision of the doctoral thesis supervisor and with the use of technical literature and other sources of information which are all quoted in the thesis and detailed in the list of literature at the end of the thesis. Brno...................... (Author s signature)
ACKNOWLEDGMENTS My sincere appreciation goes to my supervisor Mr. prof. ng. Dalibor Biolek, CSc. for his encouragement and support during my doctoral study. appreciate his inspiration, and his great efforts to explain complex and difficult issues in a clear and simple manner. am proud that studied with such a very qualified supervisor like him. Last but not least, am deeply indebted to my parents for their support, both financially and emotionally during my life and study. am also very grateful to my brother doc. ng. et ng. Fabian Khateb, Ph.D. et Ph.D. for his efforts and assistance. Of course can t forget my wife patience and my lovely child Arthur, as my heartfelt appreciation goes to them.
LST OF ABBREATONS ABB AC AGC AP BA BD BJT BP BS CC CC CC CC CCC CCCDTA CCCDBA CCCCTA CCCFTA CCCTA CCTA CDU CDBA CDB CDDOTA CDDBA CDDTA CDDOBA CDDDOBA CDeTA CDTA CE CF Active Building Block Alternating Current Automatic Gain Control All Pass Buffered Amplifier Bulk Driven Bipolar Junction Transistor Band Pass Band Stop Current Conveyor First Generation Current Conveyor Second Generation Current Conveyor Third Generation Current Conveyor Current Controlled Current Conveyor Current Controlled Current Differencing Transconductance Amplifier Current Controlled Current Differencing Buffered Amplifier Current Controlled Current Conveyor Transconductance Amplifier Current Controlled Current Follower Transconductance Amplifier Current Controlled Current nverter Transconductance Amplifier Current Conveyor Transconductance Amplifier Current Differencing Unit Current Differencing Buffered Amplifier Current Differencing oltage Buffer Current Differencing Dual Output Transconductance Amplifier Current Differencing Differential nput Buffered Amplifier Current Differencing Differential nput Transconductance Amplifier Current Differencing Differential Output Buffered Amplifier Current Differencing Differential nput Differential Output Buffered Amplifier Current Differencing external Transconductance Amplifier Current Differencing Transconductance Amplifier Characteristic Equation Current Follower
CFA CFTA CFBDTA CFBA CFBTA CFOA CFDTA CGCC C CBA CBTA CBDTA CDTA CTA CM CMOS DBTA DBeTA DC DCC DCCDBA DCC DCC DDCC DOCF DOTA DCC DCCTA DCC EEPROM EPROM ETQO FB _ DBA FBCC FDCC Current Feedback Amplifier Current Follower Transconductance Amplifier Current Follower Buffered Differential nput Transconductance Amplifier Current Follower Buffered Amplifier Current Follower Buffered Transconductance Amplifier Current Feedback Operational Amplifier Current Follower Differential nput Transconductance Amplifier Current Gain Current Conveyor Current nverter Current nverter Buffered Amplifier Current nverter Buffered Transconductance Amplifier Current nverter Buffered Differential nput Transconductance Amplifier Current nverter Differential nput Transconductance Amplifier Current nverter Transconductance Amplifier Current Mode Complementary Metal Oxide Semiconductor Differential nput Buffered and Transconductance Amplifier Differential nput Buffered and external Transconductance Amplifier Direct Current Differential Current Conveyor Digitally Controlled Current Differencing Buffered Amplifier Differential Current oltage Conveyor First Generation Differential Current oltage Conveyor Differential Difference Current Conveyor Double Output Current Follower Dual Output OTA Differential oltage Current Conveyor Differential oltage Current Conveyor Transconductance Amplifier Dual _ Current Conveyor Electrically Erasable Programmable Read Only Memory Erasable Programmable Read Only Memory Electronically Tunable Quadrature Oscillator Fully Balanced oltage Differencing Buffered Amplifier Fully Balanced Second Generation Current Conveyor Fully Differential Second Generation Current Conveyor
FG FN FO GB GCM GD GSM HP C CC CC CC CFTA C C C KHN LP LP L MCC MCC MDCC MSO MO _ OTA MOSFET MOST MSO NH OC OF OFC OPA OTA Floating Gate Fowler Nordheim Frequency of Oscillation Gain Bandwidth Generalized Current Mirror and nverter Gate Driven Global System for Mobile communication High Pass ntegrated Circuit nverting First Generation Current Conveyor nverting Second Generation Current Conveyor nverting Third Generation Current Conveyor nverted Current Follower Transconductance Amplifier nverting First Generation oltage Conveyor nverting Second Generation oltage Conveyor nverting Third Generation oltage Conveyor Kerwin _ Huelsman _ Newcomb Low Power Low Pass Low oltage Modified Second Generation Current Conveyor Modified Third Generation Current Conveyor Modified Differential Second Generation Current Conveyor Multi _ nput Single _ Output Multiple Output Operational Transconductance Amplifier Metal Oxide Semiconductor Field Effect Transistor MOSFET Transistor Multiphase Sinusoidal Oscillator Notch Filter Oscillation Condition Oscillation Frequency Operational Floating Conveyor Operational Amplifier Operational Transconductance Amplifier
OTA _ C OTRA QFG QO SFG SMO SO SPCE THD TSMC UCC UGF U UC B C CCS C C C DBA DTA F FA OA M C Operational Transconductance Amplifier _ Capacitor Operational Transresistance Amplifier Quasi Floating Gate Quadrature Oscillator Signal Flow Graph Single nput Multiple Output Silicon On nsulator Simulation Program with ntegrated Circuit Emphasis Total Harmonic Distortion Taiwan Semiconductor Manufacturing Company Universal Current Conveyor Unity Gain oltage Follower Ultraiolet Universal oltage Conveyor oltage Buffer oltage Conveyor oltage Controlled Current Source First Generation oltage Conveyor Second Generation oltage Conveyor Third Generation oltage Conveyor oltage Differencing Buffered Amplifier oltage Differencing Transconductance Amplifier oltage Follower oltage Feedback Amplifier oltage Operational Amplifier oltage Mode _ Copy
LST OF SMBOLS a, b general current transfer coefficients a i α coefficients of non _ cascade synthesis non _ ideal current gain β, δ, γ, μ w non _ ideal voltage gains C capacitor C BC Cbd Cbs Cbsub CGC C gs Cj C O D Ɛ i Ɛ O Ɛ si Ɛ v f f fc ft φ g o,eff G g m g mb g m, eff gm _ FG gm _ QFG B DSsat total bulk channel capacitance bulk to drain parasitic capacitance bulk to source parasitic capacitance bulk to substrate parasitic capacitance total gate channel capacitance gate to source parasitic capacitance zero bias junction capacitance gate oxide capacitance per unit area denominator of transfer function current tracking error dielectric permittivity permittivity of silicon voltage tracking error frequency characteristic frequency cut off frequency transition frequency phase effective output conductance conductance transconductance bulk transconductance effective transconductance floating gate transconductance quasi floating gate transconductance bias current of the transconductance drain source current in saturation µ free electron mobility in the channel L inductor λ channel length modulation coefficient
ω Q q QFG R R large s=jω S t O tsi DD, SS DS GS BS v noise T W/L pole frequency quality factor charge of an electron residual charge trapped at the FG during the fabrication process resistor large _ value resistor complex parameter - Laplace operator sensitivity oxide thickness thickness of the depletion layer between the channel and the bulk terminal voltage of an active element supply voltages of CMOS structure drain to source voltage gate to source voltage bulk to source voltage input referred noise power spectral density thermal voltage CMOS transistor dimensions admittance impedance
CONTENTS NTRODUCTON... STATE OF THE ART... 3. Active Elements... 3.. Survey of Active Elements... 3.. Relationship between Active Elements... 3..3 Active Elements Based on UCC and UC... 34..4 Sub _ Conclusion... 36. Low oltage Low Power Techniques... 37.. Bulk Driven Technique... 38.. Floating Gate Technique... 43..3 Quasi Floating Gate Technique... 48..4 Bulk Driven _ Floating Gate and Bulk Driven _ Quasi Floating Gate... 5..5 Sub _ Conclusion... 55.3 Filter and Oscillator Concepts... 55.3. Sub _ Conclusion... 58 THESS OBJECTES AND RESULTS... 59. New Design of Active Elements and Their Properties... 59.. L LP BD _ CC± Based on Folded Cascode OTA... 59.. Ultra _ LP FG _ CC+ Based on Folded Cascode OTA... 7..3 L Ultra _ LP QFG _ CC Based On Folded Cascode OTA... 77..4 L Ultra LP FG _ DCC Based on Folded Cascode OTA... 83..5 L LP High _ Precision BD _ DBeTA... 9..6 Ultra _ L BD _ QFG Transconductor... 4..7 High _ Precision GD _ CCCDBA... 9..8 High _ Precision GD _ DBA.....9 Sub _ Conclusion... 8. Filters and Oscillators Applications...
.. Current Mode Multifunction Filter Based on BD _ CC±..... Current Mode Quadrature Oscillator Based on FG _ CC+... 5..3 Current Mode Quadrature Oscillator Based on QFG _ CC±... 8..4 oltage Mode Multifunction Filter Based on FG _ DCC... 3..5 oltage Mode Oscillator Based on BD _ DBeTA... 35..6 oltage Mode Multifunction G m _ C Filter Based on BD _ QFG Transconductor 4..7 Electronically Tunable oltage Mode Quadrature Oscillator Based on GD _ CCCDBA... 4..8 oltage Mode Multifunction Filter Based On GD _ DBA... 47..9 Sub _ Conclusion... 49 3 CONCLUSON... 5 BBLOGRAPH... 5 LST OF APPENDCES... 59 Curriculum itae... 6
LST OF TABLES Tab... Survey of current conveyors.... 3 Tab... Survey of other known active elements.... 7 Tab..3. Survey of novel active elements.... 9 Tab..4. Relations of transconductance, threshold voltage, output conductance and transient frequency for GD, BD, FG, QFG, BD _ FG, and BD _ QFG MOSTs operating in saturation region.... 53 Tab... Simulation results of the L LP BD _ CC± based on folded cascode BD _ OTA.... 63 Tab... Component values and transistor aspect ratios from Fig..3.... 65 Tab..3. Performance comparison of the proposed L LP BD _ CC± with L LP CCs and high precision CCs in the literature.... 69 Tab..4. Simulation results of the L LP class AB CC+ based on folded cascode FG _ OTA... 7 Tab..5. Component values and transistor aspect ratios from Fig..3.... 7 Tab..6. Performance comparison of the proposed L LP FG _ CC+ with L LP CCs and high _ precision CCs in the literature... 77 Tab..7. Simulation results for the L LP class AB CC.... 79 Tab..8. Component values and transistor aspect ratios from Fig...... 8 Tab..9. Performance comparison of the proposed L LP CC with L LP CCs and highprecision CCs in the literature.... 83 Tab... Simulation results of the L ultra LP DCC based on folded cascode FG _ OTA.... 9 Tab... Component values and transistor aspect ratios from Fig..8.... 9 Tab... Performance comparison of the proposed L LP FG _ DCC with L LP DCC in the literature.... 9 Tab..3. Simulation results of the L LP BD _ DBeTA based on folded cascode BD _ OTA.... 97 Tab..4. Component values and transistor aspect ratios from Fig..38.... 97 Tab..5. Performance comparison of BD _ QFG transconductor with other transconductors based on BD and QFG techniques.... 8 Tab..6. Component values and transistor aspect ratios.... 4 Tab..7. Simulation results for the DBA... 7 Tab..8. Sensitivities of circuit components.... 4 Tab..9. Comparison between various oscillators using CDBA... 47
LST OF FGURES Fig... CDTA and its relations.... 3 Fig... CDBA and its relations.... 3 Fig..3. CFTA and CFBA relations... 33 Fig..4. CTA and CBA relations.... 33 Fig..5. Realization of current conveyors using UCC.... 34 Fig..6. Realization of some active elements using UCC.... 35 Fig..7. Realization of voltage conveyors and other active elements using UC.... 35 Fig..8. BD N _ MOST: a) symbolic and b) cross _ section.... 38 Fig..9. Common _ source amplifier: conventional GD _ NMOST (a), BD _ NMOST (b).... 39 Fig... Drain currents versus gate _ source voltage of GD _ MOST and bulk _ source of BD _ MOST voltage.... 39 Fig... Bulk current versus bulk _ source voltage of BD _ MOST for temperatures of, 7 and 6 C.... 4 Fig... Small _ signal equivalent circuits of the common source amplifier based on: a) GD _ NMOST, b) BD _ NMOST presented in Fig..9.... 4 Fig..3. Small signal equivalent circuit at high frequencies of the common source amplifier based on: a) GD _ NMOST, b) BD _ NMOST.... 4 Fig..4. FG _ NMOST, a) symbolic, b) equivalent, c) layout.... 44 Fig..5. Common _ source amplifier: FG _ NMOST (a) and conventional GD _ MOST (b)... 46 Fig..6. Drain currents versus gate _ source voltages of the FG and GD _ NMOST.... 46 Fig..7. Small signal equivalent circuit of the common source amplifier based on FG _ NMOST.... 47 Fig..8. Single input QFG _ MOST a) symbolic with R large, b) symbolic with M R, c) equivalent circuit of (b), d) layout.... 48 Fig..9. Common _ source amplifier: conventional GD (a) and QFG _ MOST (d)... 5 Fig... Drain currents versus gate _ source of GD _ MOST and QFG _ MOST voltages.... 5 Fig... QFG _ MOST: small signal model... 5 Fig... BD _ QFG MOST: symbol (a) and realization in MOS technology (b)... 5 Fig..3. Small _ signal models for BD _ QFG MOSTs.... 5 Fig..4. Common _ source amplifier based on: conventional GD (a), BD (b), FG (c), QFG (d), BD _ FG (e), and BD _ QFG (f) MOSTs.... 53 Fig..5. Drain currents versus gate-source of GD MOST, bulk-source of BD MOST, gate _ source of FG _ MOST, gate _ source of QFG _ MOST, gate-bulk-source of BD _ FG _ MOST and BD _ QFG _ MOST voltages of N _ MOSTs from Fig..4... 54 Fig..6. Basic principle of two _ integrator based QO.... 57 Fig... Model of non _ ideal BD _ CC±.... 6 Fig... High precision BD _ CC± based on dual output and one output BD _ CC+.... 6 Fig..3. CMOS implementation of the novel L LP CC± based on folded cascode BD _ OTA [38].... 6 Fig..4. DC curves + and - versus.... 64 Fig..5. Current errors: _ + and - +.... 64 Fig..6. Frequency responses of current gains + / and - /... 65 Fig..7. Frequency dependence of parasitic impedances of + and _ terminals.... 65 Fig..8. Frequency dependence of parasitic impedance of terminal.... 66 Fig..9. DC curve versus... 66 Fig... oltage error.... 67
Fig... Frequency responses of voltage gain /... 67 Fig... Temperature analysis of bulk current and bulk _ source voltage versus.... 68 Fig..3. CMOS implementation of the novel L LP class AB CC+ based on FG folded cascode OTA [43]... 7 Fig..4. DC curve + versus and current error +... 73 Fig..5. DC curve versus shows rail _ to _ rail operating range and voltage error.... 73 Fig..6. Frequency response of current gain + /.... 74 Fig..7. Frequency responses of voltage gain /... 74 Fig..8. Frequency dependence of parasitic impedance of terminal.... 75 Fig..9. Frequency dependence of parasitic impedance of + terminal.... 75 Fig... nput and output waveforms with amplitude μa and f = khz with THD.9%.... 76 Fig... CMOS implementation of the L LP class AB CC based on QFG transistors [44]... 78 Fig... DC curve versus and the current error.... 8 Fig..3. versus shows the rail _ to _ rail swing capability and the voltage error... 8 Fig..4. Frequency responses of current and voltage gains.... 8 Fig..5. Frequency dependence of parasitic impedance of and terminals.... 8 Fig..6. Temperature analysis of drain current of M R versus.... 8 Fig..7. Model of non _ ideal FG _ DCC.... 83 Fig..8. CMOS implementation of the novel L LP DCC based on floating-gate folded cascode OTA [6]... 85 Fig..9. Frequency dependence of parasitic impedance of terminal.... 86 Fig..3. Frequency dependence of parasitic impedance of terminal.... 87 Fig..3. Frequency response of current gain / and voltage gains /, /.... 87 Fig..3. DC curves versus for = [ _ 5, _ 5,, 5, 5] m.... 88 Fig..33. DC curves versus for = [ _ 5, _ 5,, 5, 5] m.... 88 Fig..34. DC curve versus... 89 Fig..35. Schematic symbol of BD _ DBeTA.... 9 Fig..36. Model of non _ ideal BD _ DBeTA.... 93 Fig..37. nternal structure of BD _ DBeTA built from BD folded cascode OTAs.... 94 Fig..38. CMOS implementation of the L LP BD folded cascode OTA [6]... 95 Fig..39. DC curves p versus yp and voltage error _ p yp.... 98 Fig..4. DC curves z versus p or n and current errors _ z p, z + n... 98 Fig..4. DC curve p versus p for evaluating small _ signal input resistance of the p terminal, on condition that the y p terminal is grounded.... 99 Fig..4. Frequency dependence of the impedances of p, n and w terminals.... 99 Fig..43. Frequency dependence of the impedances of z and x terminals.... Fig..44. Frequency responses of current gains z / p and z / n, on condition that the z terminal is grounded.... Fig..45. Frequency responses of voltage gains p / yp, n / yn, w / z.... Fig..46. DC characteristics of OTA No. 3 with R set linearization and transconductance control. Fig..47. Frequency responses of OTA No. 3 transconductances.... Fig..48. Temperature analysis of yp versus yp... Fig..49. Temperature analysis of bulk _ source voltage of transistor M versus yp of OTA No..... 3 Fig..5. Bulk current b of transistor M versus p of OTA No..... 3 Fig..5. Electrical symbol of the tunable transconductor.... 4
Fig..5. CMOS structure of the transconductor based on new BD _ QFG technique [47].... 5 Fig..53. DC output current versus input voltage with stepping R set from [8 to 3] kω with 4 kω step.... 7 Fig..54. nputs and output impedances versus frequency.... 7 Fig..55. Simulated and calculated transconductance value versus R set... 8 Fig..56. Symbol of CCCDBA (a) and its equivalent circuit (b).... 9 Fig..57. Proposed MOS structure of CCCDBA [].... 9 Fig..58. Resistances of p and n terminals versus the bias current B... Fig..59. Frequency responses of current gains z / p and z / n.... Fig..6. DC curves z versus p and n.... Fig..6. Frequency dependence of parasitic impedance of w terminal.... Fig..6. The circuit symbol of the DBA.... Fig..63. The circuit symbol of the non _ ideal DBA.... 3 Fig..64. CMOS structure of DBA [3]... 5 Fig..65. Frequency responses of terminal impedances with varying bias current B... 5 Fig..66. Frequency responses of W terminal impedances... 6 Fig..67. AC characteristics of OTA and transconductance control with various bias current B.... 6 Fig..68. DC curves W versus and voltage tracking error Δ= _ W for various loads R load = 5 Ω, Ω, 5 Ω.... 7 Fig..69. Second order current mode multifunction filter [38].... Fig..7. Simulated frequency responses of the filter.... Fig..7. nput and output waveforms of the BP response with amplitude 3 μa and f = khz.... Fig..7. Tuning of the BP characteristic of the universal filter for R = 8 kω, kω and 3 kω.... 3 Fig..73. Gain and phase response of the AP filter.... 3 Fig..74. nput and output waveforms of the AP response with amplitude 3 μa and f = khz.... 4 Fig..75. Quadrature oscillator based on L LP FG _ CC+ [43].... 6 Fig..76. Waveforms of the oscillator output currents.... 7 Fig..77. Spectrum of the oscillator output currents.... 8 Fig..78. Quadrature oscillator with L LP class AB CC [44]... 8 Fig..79. Growing oscillations of the quadrature oscillator output currents.... 3 Fig..8. Steady _ state waveforms of the quadrature oscillator output currents.... 3 Fig..8. Spectrum of the oscillator output currents.... 3 Fig..8. Multifunction voltage mode filter using DCCs [6]... 3 Fig..83. LP and HP voltage responses for Q =, f = [.3,, 3] khz.... 33 Fig..84. Simulated (a) BP, (b) BR responses for f = khz, Q = [.5,, 5].... 34 Fig..85. THD analysis results of the proposed LP filter.... 35 Fig..86. The proposed oscillator based on BD _ DBeTA [6].... 35 Fig..87. The oscillator with non _ idealities of BD-DBeTA... 36 Fig..88. Growing oscillations of the oscillator output voltage.... 37 Fig..89. Steady state waveform of the oscillator output voltage.... 37 Fig..9. Spectrum of the oscillator output voltage.... 38 Fig..9. Monte Carlo simulation with hundred runs for steady _ state waveform of the oscillator output voltage.... 38
Fig..9. Monte Carlo simulation with hundred runs of spectrum of the oscillator output voltage.... 39 Fig..93. nfluence of n terminal resistance on the output waveforms.... 39 Fig..94. nfluence of n terminal resistance on the deviation of oscillation frequency.... 4 Fig..95. Second order G _ m C multifunction filter based on two BD _ QFG transconductors and two capacitors [47].... 4 Fig..96. The frequency and phase responses of the second order G _ m C multifunction filter.... 4 Fig..97. Dependence of the output harmonic distortion of the second order LP filter on the input voltage with khz and khz.... 4 Fig..98. Quadrature oscillator based on CCCDBA [].... 4 Fig..99. Quadrature oscillator based on CCCDBA with parasitic components.... 43 Fig... Growing oscillations of the quadrature oscillator output voltages.... 44 Fig... Steady-state waveforms of the oscillator output voltages.... 45 Fig... Spectra of the oscillator output voltages.... 45 Fig..3. The oscillation frequency versus B for various capacitance values.... 46 Fig..4. The variation of THD with the generated frequency.... 46 Fig..5. M Filter application [3].... 47 Fig..6. Frequency response of the proposed universal filter.... 48
NTRODUCTON Although in most modern electronic systems, signal processing and storage are performed in digital domain, ASP (Analog Signal Processing) is still required since the real _ world signal is represented in the analog form. As a result, most electronic equipments comprise analog processing circuitry that acts as interface between the digital _ world and the real _ world. However, analog signal is processed for variety of purposes, such as to remove unwanted noise, to correct distortion, to make the signal suitable for transmission or to extract certain meaningful information. The term ASP expresses plentiful of techniques that can be implemented to process analog signals including the theory and application of filtering, coding, transmitting, estimating, detecting, analyzing and reproducing analog signals []. Many years ago, analog blocks, so _ called active elements, have been appeared []. These active blocks replaced the passive ones. Through active elements numerous of applications can be designed to process analog signal such as filters, oscillators, rectifiers and so forth. However, the term CM (Current Mode), M (oltage Mode) and MM (Mixed Mode) is inherent to active element term. Representing the processing signal by voltage quantities is called M, while the CM technique involves using current signals. Furthermore, CM signal processing may be defined as the processing of current signals in an environment where voltage signals are irrelevant in determining circuit performance. Moreover, the term CM has also been used to describe a system which has a current transfer function. Recently, there have been attempts at applying CM techniques to various kinds of electronic circuit design; this is motivated by the quest for higher _ frequency performance/ inherent signal bandwidths, greater linearity, wider dynamic range, trend to lower supply voltages, lower power consumption and simplicity in implementing operations over its counterpart M. However, it should be noted here that in CM elements the voltage values appear naturally at the impedance nodes. This value should be low to get rid of distorted signal; this can be achieved by making the node impedance as low as possible [3] and [4]. The aforementioned advantages of CM lead to be utilized in many attractive applications such as CM filters, oscillators and many others. Also it should be noted that for the best implementation of M active filter then the next condition should be taken into account; high input impedance and low output impedance. By applying this condition then several cells of this kind can be directly connected in cascade without needing additional circuits. n other words, connecting low impedance output of the first cell (source) to high input one of the second cell (load) will not distort the frequency response. Whilst in case of CM active filter then low input impedance and high output impedance condition should be taken into account. Assuming that these conditions are not applied, then in case of real C (ntegrated Circuit) M active filter with high _ impedance output, an output buffer is needed, since a resistive load connected to the output node would otherwise change the transfer function. Whilst in case of real C CM active filter with high _ impedance input, an input buffer is needed, since the input nodes must be driven by a high _ resistance device. However, the aim of this thesis is to find new active elements or even improve the existing ones and applying those to new applications such as filters and oscillators. Factually, the main focus of this thesis is on L LP (Low voltage Low Power) field for implementing analog circuits because this field has become essential in C design in order to ensure reliable functioning of devices, to prevent overheating caused by increasing density of components
per unit area and to prolong the battery lifetime in case of portable electronic equipment and implantable medical devices [5] and [6]. The thesis is organized as follows: Chapter presents the necessary knowledge and information related to active elements and L LP techniques, hence, facilitating utilizing L LP techniques for implementing new design of active elements. Moreover, the main concept of filter and oscillator design is also included to simplify understanding their implementation. Chapter presents new CMOS design of some active elements based mainly on L LP techniques and others based on the conventional one, as follows: L LP BD _ CC± based on folded cascode OTA. Ultra _ LP FG _ CC+ based on folded cascode OTA. L Ultra _ LP QFG _ CC based on folded cascode OTA. L Ultra _ LP FG _ DCC based on folded cascode OTA. L LP High _ Precision BD _ DBeTA. Ultra _ L BD _ QFG Transconductor. High _ precision GD _ CCCDBA. High _ precision GD _ DBA. To validate the functionality of the aforementioned circuits, thus, chapter illustrates their usages in interesting applications, i. e. filters and oscillators as follows: Current mode multifunction filter as an application of the BD _ CC±. Current mode quadrature oscillator as an application of the Class AB FG _ CC+. Current mode quadrature oscillator as an application of the QFG _ CC. oltage mode multifunction filter as an application of the FG _ DCC. oltage mode oscillator as an application of the BD _ DBeTA. oltage mode multifunction Gm _ C filter as an application of BD _ QFG transconductor. Electronically tunable voltage mode quadrature oscillator as an application of the GD _ CCCDBA. oltage mode multifunction filter as an application of GD _ DBA. t is worth mentioning here that all circuits exhibited in this thesis are novel and their advantages are compared with the literature presented solutions. Moreover, most of them are already published in international journals with high impact factor and were cited by numerous researchers.
STATE OF THE ART The field of L LP CMOS technology has grown rapidly in recent years; it is an essential prerequisite particularly for portable electronic equipment and implantable medical devices due to its influence on battery lifetime. Recently, significant improvements in implementing circuits working in the L LP area have been achieved, but circuit designers face severe challenges when trying to improve or even maintain the circuit performance with reduced supply voltage. n this chapter, state of the art of active elements and L LP techniques are illustrated and described. Active elements section describes in details the properties of active elements and how they are related to each others. Moreover, exhibition of active elements based on UCC (Universal Current Conveyor) and UC (Universal oltage Conveyor) is also included. The section of L LP depicts many techniques and methods utilized in the relative area. However, this depiction gives deep comprehension of these techniques and thus facilitates understanding of active elements based on these methods.. Active Elements n view of limitation of op _ amp with capacitive load and inherent on _ chip tunability, the OTA operational transconductance amplifier is extensively preferred in many applications. Hereafter, active elements were appeared to replace the op _ amp element []. This section describes in details the properties of active element and how they are related to each others. Moreover, exhibition of active elements based on UCC and UC is also included... Survey of Active Elements Nowadays, there is majority numbers of different active elements that it may be often confusing. Hence, this section maps the state of the art of active elements from almost the oldest one hitherto. Due to the vast number of active elements then mapping is clarified by a table to facilitate conception and to overcome the complexity. Demonstration of active elements with thier matrix equations is given in Tab.. _ 3. However, active elements that are supposed to be utilized in this thesis for implementing interesting applications are deeply described in the next section. Symbol Tab... Survey of current conveyors. Matrix equation CC x First Generation Current Conveyor [7] 3
4 CC x Second Generation Current Conveyor [8] _ CC± + x + - + - Second Generation Current Conveyor± [8] _ CC± + x + - + - nverting CC± [8] CC± + x + - + - _ Third Generation Current Conveyor [9] DCC x Differential oltage Current Conveyor []
5 DDCC 3 x 3 3 Differential Difference Current Conveyor [] 3 3 DCC Differential Current Conveyor [] MDCC Modified Differential CC [3] DCC p p n n p n n p p n p n Dual- CC [4] n p n p n p FDCC + + 3 4 + + - - + - + - 3 3 4 4 Fully Differential CC [5] Or Fully Balanced CC [6] 4 3 MCC x Modified CC [7]
6 W OFC W W Operational Floating Conveyor [8] W t W R 3 + + UCC 3 + + - - 3 + + - - Universal Current Conveyor [9] 3 3 MCC + Modified CC [] + + - CCC± _ B Current Controlled Conveyor [] R + CGCC Current Gain CC [] a + _ + W _ UC + - W + - + - W + - Universal oltage Conveyor [3] W W
7 Tab... Survey of other known active elements. Symbol Matrix equation n p w p n w p n OTRA w Operational Transresistance Amplifier [4] w n p M M w n p R R n p w CDBA z p n z z w w p n Current Differencing Buffered Amplifier [5] Or Differential Current oltage Conveyor [6] Or Current Differencing oltage Buffer w z n p w z n p n p w CCCDBA z p n z z w w p n B Current Controlled CDBA [7] z x n p m n p x z n p g R R n p w DCCDBA z p n z z w w p n α Digitally Controlled CDBA [8] n p w z n p w z n p x _ CDTA± x+ p n + + - - p n z z z Current Differencing Transconductance Amplifier [9] n p x x z m m n p x x z g g
8 B C n p x _ CCCDTA x+ p n + + - - p n z z z Current Controlled CDTA [3] z x n p m n p x z n p g R R GCM Generalized Current Mirror and nverter [3] Or Double Output Current Follower [3] b a O O CCCCTA O B B Current Controlled CCTA [33] O m O g R - + + - - DCCTA B B _ O O O Differential oltage CCTA [34] O m O g
9 Tab..3. Survey of novel active elements. Symbol Matrix equation p x+ p x+ x+ p CFTA z z z x _ x- x- Current Follower Transconductance Amplifier [] p x z m p x z g n x+ n n CTA z z z x _ x- x- Current nverter Transconductance Amplifier [] Or nverted Current Follower Transconductance Amplifier n x z m p x z g p x+ p x+ p CCCFTA z z z x _ x- x- B B Current-Controlled CFTA [] p x z p m p x z R g n x+ n x+ n CCCTA z z z x _ x- x- B B Current-Controlled CTA [] p x z p m p x z R g
3 p x+ p x+ P CFDTA z z z x _ x- x- v v v Current Follower Differential nput Transconductance Amplifier [] x x v z p m m m m x x v z p v v v v i g g g g n x+ n x+ n CDTA z z z x _ x- x- v v v Current nverter Differential nput Transconductance Amplifier [] x x v z n m m m m x x v z n v v v v i g g g g p x+ p x+ x+ w w p CFBTA w z z z x _ x- x- Current Follower Buffered Transconductance Amplifier [] p x w z m p x w z g n x+ n x+ x+ w w n CBTA w z z z x _ x- x- Current nverter Buffered Transconductance Amplifier [] n x w z m n x w z g n x+ n x+ x+ w w n CBDTA w z z z x _ x- x- v v v Current nverter Buffered Differential nput Transconductance Amplifier [] v n x w z m m v n x w z g g
p DBA n n p z n p w w w p n z w g m g m p n z oltage Differencing Buffered Amplifier [] p n p p n n z DTA x+ x _ x- x- x+ x p n z g mz g mz g mx n z p oltage Differencing Transconductance Amplifier [].. Relationship between Active Elements Comprehension the relation between active elements and how are derived from each other is very important, since it gives general and clear idea helps to think out new active elements with better features. Thus, the following figures focus on some recent active elements and describe how these elements are related/ derived to/ from each other. The CDTA (Current Differencing Transconductance Amplifier) or more specifically CDDOTA (Current Differencing Dual Output Transconductance Amplifier) published in year 3 by Biolek [9] has been considered to be a versatile active element for CM signal processing. CDTA uses CDU (Current Differencing Unit) as an input stage and DOTA (Dual Output Transconductance Amplifier) as output stage. Replacing input/output stage of the conventional CDTA by another element leads to create new active elements appropriate to work in CM area. Fig. shows the aforementioned consideration of conventional CDTA. Number () illustrates that when the input stage CDU of CDTA is simplified to CF (Current Follower) or C (Current nverter), then CFTA (Current Follower Transconductance Amplifier) or CTA (Current nverter Transconductance Amplifier) are obtained respectively, while the output stage DOTA with one grounded input remains the same. Number () illustrates that when both differential input terminals of output stage DOTA of CDTA are utilized while the input stage CDU remains the same, then active element CDDTA (Current Differencing Differential nput Transconductance Amplifier) [] is obtained. 3
p CDTA x + p x + CDDTA n z x n z v x f CFTA x + n CTA x + z x z x Fig... CDTA and its relations. Note that in case of voltage input, DTA (oltage Differencing Transconductance Amplifier) [] is used instead of CDTA and similar methodology diagram can be applied; where differential input OTA is utilized for realizing voltage difference instead of CDU. p p CDBA w n z n p n CDDBA w z v w CDDOBA z w p w CDDDOBA n z v w f CFBA w n CBA w z z Fig... CDBA and its relations. The CDBA (Current Differencing Buffered Amplifier) or more specifically CDB (Current Differencing oltage Buffer) or as so _ called DCC (Differential Current oltage Conveyor) is introduced in year 999 b y Acar [5]. CDBA uses CDU as an input stage and BA (Buffered Amplifier) as output stage. Fig. shows the conventional CDBA element and its relations to create new active elements. As shown by number () the CFBA (Current Follower Buffered Amplifier) or CBA (Current nverter Buffered Amplifier) are obtained when the input stage CDU is simplified to CF or C respectively, while the output stage unity gain voltage buffer or the so _ called unity gain buffered amplifier remains the same. Number () illustrates that when the input stage CDU of CDBA is remained the same while both input terminals of output stage unity gain BA are utilized then the CDDBA (Current Differencing Differential nput Buffered Amplifier) active element is obtained. n the same manner, CDDOBA (Current Differencing Differential Output Buffered Amplifier) active element is obtained when both output terminals of output stage unity gain BA are utilized. Number () shows the combination of CDDBA and CDDOBA, where CDU remains the same, and both two inputs and two outputs of output stage unity gain BA are utilized. Thus, CDDDOBA (Current Differencing Differential nput Differential Output Buffered Amplifier) active element is obtained. Note that in case of voltage input, DBA (oltage Differencing Buffered Amplifier) is used instead of CDBA and similar methodology diagram can be applied; where differential input OTA is utilized for realizing voltage difference instead of CDU. 3
f CFTA z x + x f CFBTA z x + w x f CFBDTA x + w z v x f CFBA w z Fig..3. CFTA and CFBA relations. Fig.3 number () shows that when CFTA and CFBA are combined together then CFBTA (Current Follower Buffered Transconductance Amplifier) active element is obtained; where the input stage CF remains the same and the output stage consists of the combination of OTA and unity gain BA. Note that OTA has two inputs, one of them is grounded. Number () illustrates the CFBDTA (Current Follower Buffered Differential nput Transconductance Amplifier) active element as an improvement of CFBTA; CFBDTA is obtained when the input stage CF remains the same and the output stage consists of the combination of OTA and unity gain BA. Notice that OTA has two inputs, both are used. n CTA z x + x n CBTA z x + w x n CBDTA x + w z v x n CBA w z Fig..4. CTA and CBA relations. Fig.4 number () shows that when CTA and CBA are combined together the CBTA (Current nverter Buffered Transconductance Amplifier) active element is obtained; where the input stage C remains the same and the output stage consists of the combination of OTA and unity gain BA. Note, OTA has two inputs, one of them is grounded. Number () illustrates the CBDTA (Current nverter Buffered Differential nput Transconductance Amplifier) active element as an improvement of CBTA; where the input stage C remains the same and the output stage consists of combination of OTA and unity gain BA. Notice that OTA has two inputs, both are used. However, it should be noted that OTA [35] belongs to the most widespread active elements and it is utilized as a main part in lots of other active elements. t acts as a voltage _ controlled current source with the possibility of electronic adjustment of transconductance g m. 33
..3 Active Elements Based on UCC and UC Analogous to DDCC (Differential Difference Current Conveyor) [] or DDCCC (Differential Difference Complementary Current Conveyor), the UCC [9] has three high _ impedance voltage inputs, one low impedance input, and four current outputs ( +,, +, ). Outputs ( and ) are inverse to outputs ( + and + ) respectively. MO-OTA N+ + OUT+ N- 3 UCC + OUT+ OUT- OUT- R set=/ g m CC± CC± + + 3 + UCC + _ 3 + UCC + _ CC± CC± 3 + + UCC + _ 3 + + UCC + _ CC± CC± + + + + 3 + UCC _ 3 + UCC _ + + UCC _ 3 3 _ DCC DCC± + + + UCC _ Fig..5. Realization of current conveyors using UCC. Through suitable interconnection or grounding of the terminals, the UCC enables the realization of all types and generations of CCs such as CC+, CC, CC+/, CC+, CC, CC+/, CC+, CC, CC+/, inverting types of current conveyors such as CC+, CC, CC+/, CC+, CC, CC+/, CC+, CC, CC+/, and other types with differential input such as DCC+, DCC, DCC+/, DCC, CC+, DDCC+, DDCC, and DDCC+/. Figs..5 and.6 depicts the realization of current conveyors and other active elements with help of UCC [9]. 34
CF CDeTA± CF CDBA p n 3 UCC C 3 UCC + + + + 3 UCC OTA + + x+ x _ p n 3 UCC C 3 UCC + + + + 3 F UCC + + z Rset=/gm z w Fig..6. Realization of some active elements using UCC. The UC [3] is a 6 _ port active element with one voltage input, two difference current inputs (+, _ ), two mutually inverse voltage outputs (+, _ ), and one auxiliary port W that is used to determine the generation of the voltage conveyor. C± C± + + + + + W + _ W UC _ W + _ W UC C± C± + + _ W UC + _ + + _ W UC + _ + _ C± C± + W + _ W UC + _ + W + + UC _ W _ + _ DCC± + + + _ + _ W UC Fig..7. Realization of voltage conveyors and other active elements using UC. 35
oltage conveyors can be used with advantage in frequency filters or oscillators working in M; all types of the voltage conveyors have one or more voltage output terminals. However, by proper interconnection or grounding of the UC terminals, it helps to construct all existing types of voltage conveyors such as C+, C, C+/, C+,C, C+/, C+, C, C+/, inverting _ types of voltage conveyors such as C+, C, C+/, C+, C, C+/, C+, C, C+/, and other types with differential input such as DCC+ or as it called (CDBA), DCC, and DCC+/. Fig..7 depicts the realization of voltage conveyors and other active elements with help of UC [3]...4 Sub _ Conclusion Recently, interest in new active elements proposed to work in ASP has continuously been growing. This growing interest came from the benefits of these elements especially in large bandwidth and high slew _ rates. Researchers are improving active elements based on the base blocks of FA (oltage Feedback Amplifier), CFA (Current Feedback Amplifier), OTA (Operational Transconductance Amplifier) and CC (Current Conveyor) []. Combinations of some active elements lead to new ones with more versatility. E.g. CFOA (Current Feedback Operational Amplifier) [36] is a combination of the CC and F (oltage Follower). However, this chapter dealt with historical review of active elements. Describing in details the properties of active elements and how they are related to each other was shown. Moreover, exhibition of active elements based on UCC and UC was included as well. However, active elements that are supposed to be utilized in this thesis for implementing interesting applications are deeply described in the next section. 36
. Low oltage Low Power Techniques Admittedly, the perpetual trends in CMOS technology towards increasing density of components on chip, continuous down _ scaling of processes and prolonging the battery lifetime of portable and battery _ powered equipment have shifted the research towards the L LP (Low oltage Low Power) area. The term L LP has taken a leading role in analog circuit research over the past decade. Such research involves finding promising ways of making the whole analog system work in L LP area. Although the effort to reduce the voltage power supply to ever _ lower values seems to be endless, the results achieved from this research are still controversial and fiercely debated. These controversial results have been coming up since the results achieved are not adequately balanced, i.e. the L LP requirement can be fulfilled only at the expense of speed and accuracy of the circuit, and vice versa [5] and [6]. n other words, the L LP techniques suffer from several disadvantages such as low transconductance value and bandwidth that limits their applicability for some applications. However, designers should allocate priority to the most important parameters of their designs [37]. Actually, in modern L LP analog circuit design the threshold voltages of standard CMOS technologies are an obstacle facing analog circuit designers. The threshold voltage values are not expected to be decreased much below what is available today. To overcome the threshold voltage, several MOST (MOSFET Transistor) design techniques exist for L LP analog circuit design. However, only a few of them have found their way in modern designs, for instance, MOSTs operating in the sub _ threshold (weak inversion) region, level shifter techniques, self _ cascode structures, BD (Bulk Driven) technique, FG (Floating Gate) approach and QFG (Quasi Floating Gate) [38] and [39]. After all, healthcare devices move towards portability and these devices even monitor patients all day long; the L LP properties are required to improve battery longevity. Moreover, biological signals are characterized by their low amplitude and low frequency range, i.e. in range of micro up to millivolts and in range of fraction of a hertz to several kilohertz, respectively [4], [4] and [4]. n other words, biomedical applications are good examples for L LP applications. t is essential to point out that the lower transconductance value of BD, FG and QFG leads not only to lower bandwidth but also to higher input referred noise in comparison to GD (Gate Driven) MOST. Another issue is that the FG and QFG MOSTs can't process DC signals, since their input terminals are capacitively connected to the floating gate and quasi _ floating gate, respectively. Also, due to the input capacitors the silicon area requirements of FG and QFG MOSTs are increased [38], [39], [43] and [44]. From the aforementioned obstacles, the idea to build up new techniques has come up in order to combine the advantages and eliminate the disadvantages of the BD, FG and QFG techniques [45]. These interesting techniques are named BD _ FG (Bulk Driven _ Floating Gate) and BD _ QFG (Bulk Driven _ Quasi Floating Gate) and they are created by combining the BD with either the FG or QFG techniques [46] and [47]. However, in this thesis the BD _ QFG technique is utilized, since the BD _ FG MOST suffers from undesirable drawbacks related to the FG MOST such as, large occupied area on the chip, initial charge trapped on the floating gate and lack of simulation models. However, in this chapter, discussion and explanation of L LP techniques are included. 37
.. Bulk Driven Technique Due to the fact that the most significant part of analog circuit design is the input stage and because the BD technique overcomes the threshold voltage, the BD technique has been considered a promising way of realizing L LP circuits. However, based on technology accessibility, low price, design simplicity and LP consumption, the BD technique has been chosen in this thesis to implement new design of some active elements [48] and [49]. The conventional MOST is actually a four _ terminal device, i.e. drain (D), gate (G), source (S) and bulk (B). Depending on the type of used technology (i.e. N _, P _ well or twin _ tub) the bulk terminal is normally connected either to positive/negative supply voltage for PMOS/NMOS transistor, respectively, or to the transistor source terminal; n other words, the bulk terminal is ignored and not used as a signal terminal and hence a large number of possible MOS circuits are overlooked [5]. The BD technique is based on the principle of utilizing the bulk terminal as the input rather than the gate terminal [5] and [5]. Simultaneously, a sufficient bias voltage is applied to the gate to form the conduction channel between the drain and the source. As a consequence, the threshold voltage obstruction no longer appears in the signal path and the common mode range is extended. n this manner, it is possible to expand the applicability of any analog cell to extremely L environments. However, L LP achieved by the BD technique can be obtained with little sacrifice of the circuit performance; where the g mb (bulk transconductance) is smaller than the g m (gate transconductance) i.e. which is about (3 _ 5) times smaller than the gate transconductance. This drawback leads to reducing the amplifier gain and the GBW (Gain Bandwidth Product), also results in higher input _ referred noise. Another drawback is the lower unity gain frequency (f T ) caused by the smaller g mb on the one hand, and the higher input capacitance on the other hand. However, the effects of these drawbacks on the performance of these circuits could be alleviated with the help of appropriate circuit techniques used, for example, in the circuit proposed in this thesis. t should be noted here also that the BD _ MOST is a depletion _ type device, it can work under negative, zero, or even slightly positive biasing conditions [53] and [54]. N _ MOST (P _ well CMOS technology) is shown in Fig..8 to illustrate its cross section with terminals: D, G, S B and Sub. t is worth mentioning here that the P _ well CMOS technology enables to drive separately the bulk _ terminals of only N _ MOS transistors, since the P _ MOS transistors share the same substrate. D B G S (a) (b) Fig..8. BD N _ MOST: a) symbolic and b) cross _ section. 38